The disclosure of the following priority application is herein incorporated for reference: Japanese Patent Application No. 2002-096253, filed Mar. 29, 2002.
1. Field of the Invention
The present invention relates to a radio frequency identification transponder and a non-contact IC card for transmitting and receiving electric power and data by air. The present invention also relates to a semiconductor integrated circuit to be implemented on these radio frequency identification transponder and non-contact IC card.
2. Description of the Related Art
Recently, radio frequency identification transponders (hereinafter, referred to as RFID transponders) equipped with a non-contact interface have been put to use for automatic transport systems in factories, inventory management in retail stores, book stock management in libraries, and so on. In addition, such IC cards as an ID card that contains personal information and is equipped with a non-contact interface have been used in research laboratories, ticket gates of stations, and the like. RFID transponders and non-contact IC cards of this type are expected to be applied to bank cards, credit cards, resident registration cards, etc. in the future.
Among the radio interfaces of the RFID transponders and non-contact IC cards is a physical interface stated in ISO/IEC 15693 Part 2, which comes into widespread use. This interface has data transmission rates lower than those of ISO/IEC 14443 Part 2 defined separately (an interface for high performance non-contact smart cards) but communication ranges greater than those of ISO/IEC 14443 Part 2. Specifically, ISO/IEC 14443 Part 2 has communication ranges of the order of 10 cm while ISO/IEC 15693 Part 2 allows communication ranges of 50 cm and above. Consequently, ISO/IEC 15693 Part 2 is useful to transponders intended for security purposes such as theft prevention in particular.
According to the interface specifications of ISO/IEC 15693 Part 2, power and data are transmitted from a reader/writer to transponders by using a shortwave carrier frequency of 13.56 MHz. The modulation is of ASK method with two types of nominal modulation factors, 100% and 10%. Besides, data is transferred from the transponders to the reader/writer after ASK modulation (Manchester Coding) or FSK modulation. These various communication methods are registered as international standards.
For example, in a library, the reader/writer is built into a gate which is installed on a gateway. The reader/writer conducts radio communication with RFID transponders attached to books so that the books are prevented from theft. Here, the reader/writer transmits a specific request command at predetermined intervals. The RFID transponders, as they pass through the gate, receive power and the request command from the reader/writer. If the RFID transponders contain data indicating that the books are yet to be subjected to lending processing, the data indicating that the lending processing is yet to be done is transmitted from the RFID transponders to the reader/writer when the RFID transponders pass through the gate. The gate issues an alarm in response to the data from the RFID transponders, received by the reader/writer.
The RFID transponders and the non-contact IC cards implement ferroelectric memories or other nonvolatile memories as data recording media. Ferroelectric memories are nonvolatile memories which are electrically rewritable as if EEPROMs and flash memories are. When compared to the EEPROMs and flash memories, however, the ferroelectric memories are better suited for the application to RFID transponders and non-contact IC cards because their data write operations are rapid and require no high voltage.
Conventionally, the RFID transponders implement a ferroelectric memory which has a memory array containing a plurality of memory cells arranged in a matrix. Each of the memory cells has a ferroelectric capacitor and a transfer transistor. Otherwise, each of the memory cells can have two ferroelectric capacitors and two transfer transistors to improve reliability. The transfer transistor(s) of each memory cell is/are connected to a word line at the gate(s). The ferroelectric capacitor(s) of each memory cell is/are connected to a plate line at one end(s). The ferroelectric capacitor(s) of each memory cell is/are connected to a bit line(s) at the other end(s) through the transfer transistor(s).
The memory array has a plurality of word lines connected to the memory cells, a plurality of word line drivers for driving these word lines, a plurality of plate lines connected to the memory cells, a plurality of plate line drivers for driving these plate lines, a plurality of bit lines connected to the memory cells, and a plurality of sense amplifiers for amplifying the data on these bit lines. Then, in reading data from the ferroelectric memory, a word line driver, a plate line driver, and sense amplifiers are driving a plurality of the memory cells to select accessing memory cells.
Ferroelectric memories have been detailed in Ali Sheikholeslami and Glenn Gulak, xe2x80x9cA Survey of Circuit Innovations in Ferroelectric Random-Access Memoriesxe2x80x9d, Proceedings of the IEEE, vol. 88, No. 5, pp. 667-689 (2000), etc.
The RFID transponders and the non-contact IC cards run on a power supply given from an external reader/writers. Consequently, for the sake of operation, the RFID transponders and the non-contact IC cards must be brought to a predetermined distance near the reader/writer. Meanwhile, the gate requires a predetermined breadth in consideration of wheelchair access and the like. The distance between the RFID transponders and the reader/writer tends to increase accordingly.
The power for the RFID transponders to receive from the reader/writer decreases with increasing distance between the reader/writer and the RFID transponders. For low power operation, the RFID transponder must be reduced in power consumption as much as possible.
In the conventional RFID transponders and non-contact IC cards, the ferroelectric memory operates upon access from the reader/writer. The ferroelectric memory, as mentioned above, needs to activate a plurality of memory cells, and sense amplifiers upon access. Since the plate lines and the bit lines are high in charge/discharge current, the RFID transponders and non-contact IC cards have the problem of high power consumption.
Besides, in the foregoing ferroelectric memory, voltage differences between bit lines, which vary with residual polarizations of the ferroelectric capacitors, are amplified through the sense amplifiers for data read. In read operations, the bit lines make voltage variations as low as around 200 mV with small read margins. It is therefore difficult to lower the power supply voltage. That is, the ferroelectric memory to be implemented on the RFID transponders and non-contact IC cards is required to reduce power consumption.
It is an object of the present invention to reduce the power consumption of such transponders as RFID transponders or non-contact IC cards, so as to extend the communication range between these transponders and the reader/writer.
Another object of the present invention is to reduce the power consumption of a semiconductor integrated circuit to be implemented on the RFID transponders, the non-contact IC cards, or the like.
Another object of the present invention is to ensure the operation of a security system that includes the RFID transponders or non-contact IC cards and a reader/writer for conducting radio communication with these transponders.
According to one of the aspects of the present invention, a semiconductor integrated circuit includes a rectifier circuit, a memory array having a plurality of ferroelectric memory cells, and a ferroelectric holding circuit. The rectifier circuit converts an alternating current into a direct-current voltage and outputs it as a power supply voltage. For example, an RFID transponder or non-contact IC card has an antenna coil for generating an alternating current for a magnetic field.
The ferroelectric holding circuit has a volatile holding circuit and a plurality of ferroelectric capacitors. Data held in the ferroelectric holding circuit has a read margin greater than that of data held in the ferroelectric memory cells in the memory array. The ferroelectric holding circuit thus operates with reliability even if the power that the semiconductor integrated circuit (RFID transponder, non-contact IC card) receives is low. Consequently, forming the ferroelectric holding circuit on the semiconductor integrated circuit to be implemented on an RFID transponder or a non-contact IC card makes it possible to extend the communication range between the RFID transponder or non-contact IC card and a reader/writer.
Owing to the extended communication range, implementation of the semiconductor integrated circuit of the present invention on the RFID transponder etc. realizes a surely operable security system (such as a merchandise antitheft system). In addition, lowering the output of the reader/writer results in reducing the influences of the electromagnetic waves, which are emitted from the reader/writer, on humans.
The semiconductor integrated circuit of the invention has two advantages of large capacity of the memory array and low power operation of the ferroelectric holding circuit. It is hence possible, for example, to operate the memory array having the ferroelectric memory cells when enough power is available, and to operate the ferroelectric holding circuit when only restricted power is available.
According to another aspect of the present invention, an internal voltage regulator generates an internal supply voltage that is lower than the power supply voltage output from the rectifier circuit. The ferroelectric holding circuit runs on the internal supply voltage. The ferroelectric holding circuit can thus be lowered in power consumption, allowing a reduction in the power consumption of the semiconductor integrated circuit. As a result, the semiconductor integrated circuit can operate with reliability even if its supplied power is low.
According to another aspect of the present invention, a data demodulator demodulates, from an alternating current, a read command for reading data from the ferroelectric holding circuit or ferroelectric memory. That is, the semiconductor integrated circuit can demodulate data from a received alternating current. A data modulator modulates read data, which are read from the memory array or the ferroelectric holding circuit, into an alternating current in accordance with the read command. That is, the semiconductor integrated circuit can modulate the data to be transmitted into an alternating current.
According to another aspect of the present invention, a control circuit reads out data held in the ferroelectric capacitors to the volatile holding circuit at the start of supply of the power supply voltage. In the absence of the power supply voltage, data is stored in the ferroelectric capacitors in terms of nonvolatile polarization, and in the presence thereof the polarization is transferred to the volatile holding circuit, therefore, the ferroelectric holding circuit can operate as a nonvolatile data memory circuit.
According to another aspect of the present invention, the ferroelectric holding circuit has a latch circuit formed therein with two buffer circuits connected to each other at their inputs and outputs. A pair of first ferroelectric capacitors are connected in series between a first plate line and a second plate line. An intermediate node connecting the two first ferroelectric capacitors is connected to the input of one of the buffer circuits. A pair of second ferroelectric capacitors are connected in series between the first plate line and the second plate line. An intermediate node connecting the two second ferroelectric capacitors is connected to the input of the other of the buffer circuits. Data, which has been held in the latch circuit before power-off, is held as residual polarizations of the ferroelectric capacitors. The ferroelectric holding circuit may also be applied to, for example, at least either one of a master latch circuit and a slave latch circuit which are connected in cascade to form a flip-flop circuit.
After power-on, for example, a second plate voltage is grounded and a first plate voltage is raised so that the intermediate node of the first ferroelectric capacitors and that of the second ferroelectric capacitors rise in voltage according to the capacitance divisions of these ferroelectric capacitors. That is, before the two buffer circuits are powered on, the inputs of these buffer circuits reach different voltages with each other. Subsequently, a switch circuit is turned on to power the latch circuit for activation. Logic data is written to the latch circuit according to the two input voltages. As a result, the data that have been transferred from the latch circuit to the ferroelectric capacitors before power-off can be reproduced. In short, a recall operation can be performed.
The foregoing recall operation consumes extremely low power as compared to that of a ferroelectric memory having a plurality of ferroelectric memory cells, word line drivers, plate line driver, sense amplifiers, and so on. More specifically, in a read operation of the ferroelectric memory, one of the word line drivers, one of the plate line drivers, the sense amplifiers, etc. are operated to access a number of memory cells connected to a word line. This requires high power even in reading a single bit of data, for example. In contrast, according to the ferroelectric holding circuit of the present invention, data is held in the simple latch circuit during supply of the power supply voltage. The first and second plate lines have only to drive the four ferroelectric capacitors in a recall operation. This allows a reduction in power consumption.
According to another aspect of the present invention, each of the ferroelectric memory cells of the memory array includes two ferroelectric capacitors and two transfer gates. The ferroelectric capacitors are each connected to a plate line at one end, and are connected to the source of the transistor (transfer gate), whose drain is connected to a bit line, at the other end. Since the memory array has the same configuration as that of an ordinary ferroelectric memory, the semiconductor integrated circuit can be increased in data memory capacity.
According to another aspect of the present invention, each of the ferroelectric memory cells of the memory array includes a ferroelectric capacitor and a transfer gate. The ferroelectric capacitor is connected to a plate line at one end, and is connected to the source of the transistor (transfer gate), whose drain is connected to a bit line. Since the memory array has the same configuration as that of an ordinary ferroelectric memory, the data memory capacity of the semiconductor integrated circuit can increase.